Architecture and Code Optimization (TACO)


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ACM Transactions on Architecture and Code Optimization (TACO), Volume 15 Issue 1, April 2018

Improving Energy Efficiency of Coarse-Grain Reconfigurable Arrays Through Modulo Schedule Compression/Decompression
Hochan Lee, Mansureh S. Moghaddam, Dongkwan Suh, Bernhard Egger
Article No.: 1
DOI: 10.1145/3162018

SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads
Karthik Sangaiah, Michael Lui, Radhika Jagtap, Stephan Diestelhorst, Siddharth Nilakantan, Ankit More, Baris Taskin, Mark Hempstead
Article No.: 2
DOI: 10.1145/3158642

Efficient and Scalable Graph Parallel Processing With Symbolic Execution
Long Zheng, Xiaofei Liao, Hai Jin
Article No.: 3
DOI: 10.1145/3170434

DiagSim: Systematically Diagnosing Simulators for Healthy Simulations
Jae-Eon Jo, Gyu-Hyeon Lee, Hanhwi Jang, Jaewon Lee, Mohammadamin Ajdari, Jangwoo Kim
Article No.: 4
DOI: 10.1145/3177959

A Case for a More Effective, Power-Efficient Turbo Boosting
Sushant Kondguli, Michael Huang
Article No.: 5
DOI: 10.1145/3170433

Enabling SIMT Execution Model on Homogeneous Multi-Core System
Kuan-Chung Chen, Chung-Ho Chen
Article No.: 6
DOI: 10.1145/3177960

SIMPO: A Scalable In-Memory Persistent Object Framework Using NVRAM for Reliable Big Data Computing
Mingzhe Zhang, King Tin Lam, Xin Yao, Cho-Li Wang
Article No.: 7
DOI: 10.1145/3167972

Extending Moore’s Law via Computationally Error-Tolerant Computing
Bobin Deng, Sriseshan Srikanth, Eric R. Hein, Thomas M. Conte, Erik Debenedictis, Jeanine Cook, Michael P. Frank
Article No.: 8
DOI: 10.1145/3177837

Improving Parallelism in Hardware Transactional Memory
Dave Dice, Maurice Herlihy, Alex Kogan
Article No.: 9
DOI: 10.1145/3177962

Benzene: An Energy-Efficient Distributed Hybrid Cache Architecture for Manycore Systems
Namhyung Kim, Junwhan Ahn, Kiyoung Choi, Daniel Sanchez, Donghoon Yoo, Soojung Ryu
Article No.: 10
DOI: 10.1145/3177963

Performance Optimization of the HPCG Benchmark on the Sunway TaihuLight Supercomputer
Yulong Ao, Chao Yang, Fangfang Liu, Wanwang Yin, Lijuan Jiang, Qiao Sun
Article No.: 11
DOI: 10.1145/3182177

Improving MLC PCM Performance through Relaxed Write and Read for Intermediate Resistance Levels
Saeed Rashidi, Majid Jalili, Hamid Sarbazi-Azad
Article No.: 12
DOI: 10.1145/3177965

Optimizing Convolutional Neural Networks on the Sunway TaihuLight Supercomputer
Wenlai Zhao, Haohuan Fu, Jiarui Fang, Weijie Zheng, Lin Gan, Guangwen Yang
Article No.: 13
DOI: 10.1145/3177885

Energy-Performance Considerations for Data Offloading to FPGA-Based Accelerators Over PCIe
Dimitrios Mbakoyiannis, Othon Tomoutzoglou, George Kornaros
Article No.: 14
DOI: 10.1145/3180263

GPU Performance vs. Thread-Level Parallelism: Scalability Analysis and a Novel Way to Improve TLP
Zhen Lin, Michael Mantor, Huiyang Zhou
Article No.: 15
DOI: 10.1145/3177964

Visual Program Manipulation in the Polyhedral Model
Oleksandr Zinenko, Stéphane Huot, Cédric Bastoul
Article No.: 16
DOI: 10.1145/3177961