Architecture and Code Optimization (TACO)


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ACM Transactions on Architecture and Code Optimization (TACO), Volume 6 Issue 4, October 2009

Energy-efficient register caching with compiler assistance
Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oğuz Ergin
Article No.: 13
DOI: 10.1145/1596510.1596511

The register file is a critical component in a modern superscalar processor. It must be large enough to accommodate the results of all in-flight instructions. It must also have enough ports to allow simultaneous issue and writeback of many values...

Towards update-conscious compilation for energy-efficient code dissemination in WSNs
Weijia Li, Youtao Zhang, Jun Yang, Jiang Zheng
Article No.: 14
DOI: 10.1145/1596510.1596512

Postdeployment code dissemination in wireless sensor networks (WSN) is challenging, as the code has to be transmitted via energy-expensive wireless communication. In this article, we propose novel update-conscious compilation (UCC) techniques to...

The single-referent collector: Optimizing compaction for the common case
Michal Wegiel, Chandra Krintz
Article No.: 15
DOI: 10.1145/1596510.1596513

Compactors that move or copy objects need to adjust pointers. In extant compactors, pointer adjustment involves inspecting every pointer in the heap and computing the target address for each pointer. At the same time, in modern Managed Runtime...

Design and optimization of the store vectors memory dependence predictor
Samantika Subramaniam, Gabriel H. Loh
Article No.: 16
DOI: 10.1145/1596510.1596514

Allowing loads that do not violate memory ordering to issue out of order with respect to earlier unresolved store addresses is very important for extracting parallelism in large-window superscalar processors. Previous research has proposed memory...