Architecture and Code Optimization (TACO)


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ACM Transactions on Architecture and Code Optimization (TACO), Volume 3 Issue 4, December 2006

Minos: Architectural support for protecting control data
Jedidiah R. Crandall, S. Felix Wu, Frederic T. Chong
Pages: 359-389
DOI: 10.1145/1187976.1187977
We present Minos, a microarchitecture that implements Biba's low water-mark integrity policy on individual words of data. Minos stops attacks that corrupt control data to hijack program control flow, but is orthogonal to the memory model. Control...

Analysis of cache-coherence bottlenecks with hybrid hardware/software techniques
Jaydeep Marathe, Frank Mueller, Bronis R. de Supinski
Pages: 390-423
DOI: 10.1145/1187976.1187978
Application performance on high-performance shared-memory systems is often limited by sharing patterns resulting in cache-coherence bottlenecks. Current approaches to identify coherence bottlenecks incur considerable run-time overhead and do not...

Future execution: A prefetching mechanism that uses multiple cores to speed up single threads
Ilya Ganusov, Martin Burtscher
Pages: 424-449
DOI: 10.1145/1187976.1187979
This paper describes future execution (FE), a simple hardware-only technique to accelerate individual program threads running on multicore microprocessors. Our approach uses available idle cores to prefetch important data for the threads executing on...

Evaluating trace cache energy efficiency
Michele Co, Dee A. B. Weikle, Kevin Skadron
Pages: 450-476
DOI: 10.1145/1187976.1187980
Future fetch engines need to be energy efficient. Much research has focused on improving fetch bandwidth. In particular, previous research shows that storing concatenated basic blocks to form instruction traces can significantly improve fetch...

Effective management of multiple configurable units using dynamic optimization
Shiwen Hu, Madhavi Valluri, Lizy Kurian John
Pages: 477-501
DOI: 10.1145/1187976.1187981
As one of the promising efforts to minimize the surging microprocessor power consumption, adaptive computing environments (ACEs), where microarchitectural resources can be dynamically tuned to match a program's run-time requirement and...

Implicit array bounds checking on 64-bit architectures
Chris Bentley, Scott A. Watterson, David K. Lowenthal, Barry Rountree
Pages: 502-527
DOI: 10.1145/1187976.1187982
Several programming languages guarantee that array subscripts are checked to ensure they are within the bounds of the array. While this guarantee improves the correctness and security of array-based code, it adds overhead to array references. This...