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A Bimodal Scheduler for Coarse-Grained Reconfigurable Arrays
Panagiotis Theocharis, Bjorn De Sutter
Article No.: 15
Compilers for Course-Grained Reconfigurable Array (CGRA) architectures suffer from long compilation times and code quality levels far below the theoretical upper bounds. This article presents a new scheduler, called the Bimodal Modulo Scheduler...
Exploiting Hierarchical Locality in Deep Parallel Architectures
Ahmad Anbar, Olivier Serres, Engin Kayraklioglu, Abdel-Hameed A. Badawy, Tarek El-Ghazawi
Article No.: 16
Parallel computers are becoming deeply hierarchical. Locality-aware programming models allow programmers to control locality at one level through establishing affinity between data and executing activities. This, however, does not enable locality...
MInGLE: An Efficient Framework for Domain Acceleration Using Low-Power Specialized Functional Units
Cecilia González-álvarez, Jennifer B. Sartor, Carlos Álvarez, Daniel Jiménez-González, Lieven Eeckhout
Article No.: 17
The end of Dennard scaling leads to new research directions that try to cope with the utilization wall in modern chips, such as the design of specialized architectures. Processor customization utilizes transistors more efficiently, optimizing not...
FinPar: A Parallel Financial Benchmark
Christian Andreetta, Vivien Bégot, Jost Berthold, Martin Elsman, Fritz Henglein, Troels Henriksen, Maj-Britt Nordfang, Cosmin E. Oancea
Article No.: 18
Commodity many-core hardware is now mainstream, but parallel programming models are still lagging behind in efficiently utilizing the application parallelism. There are (at least) two principal reasons for this. First, real-world programs often...
A New Compilation Flow for Software-Defined Radio Applications on Heterogeneous MPSoCs
Mickaël Dardaillon, Kevin Marquet, Tanguy Risset, Jérôme Martin, Henri-Pierre Charles
Article No.: 19
The advent of portable software-defined radio (
Dynamic Process Migration Based on Block Access Patterns Occurring in Storage Servers
Jianwei Liao, François Trahay, Guoqiang Xiao
Article No.: 20
An emerging trend in developing large and complex applications on today’s high-performance computers is to couple independent components into a comprehensive application. The components may employ the global file system to exchange their...
COBAYN: Compiler Autotuning Framework Using Bayesian Networks
Amir Hossein Ashouri, Giovanni Mariani, Gianluca Palermo, Eunjung Park, John Cavazos, Cristina Silvano
Article No.: 21
The variety of today’s architectures forces programmers to spend a great deal of time porting and tuning application codes across different platforms. Compilers themselves need additional tuning, which has considerable complexity as the...
An Online and Real-Time Fault Detection and Localization Mechanism for Network-on-Chip Architectures
Kypros Chrysanthou, Panayiotis Englezakis, Andreas Prodromou, Andreas Panteli, Chrysostomos Nicopoulos, Yiannakis Sazeides, Giorgos Dimitrakopoulos
Article No.: 22
Networks-on-Chip (NoC) are becoming increasingly susceptible to emerging reliability threats. The need to detect and localize the occurrence of faults at runtime is steadily becoming imperative. In this work, we propose...