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ACM Transactions on Architecture and Code Optimization (TACO), Volume 5 Issue 2, August 2008

Performance scalability of decoupled software pipelining
Ram Rangan, Neil Vachharajani, Guilherme Ottoni, David I. August
Article No.: 8
DOI: 10.1145/1400112.1400113

Any successful solution to using multicore processors to scale general-purpose program performance will have to contend with rising intercore communication costs while exposing coarse-grained parallelism. Recently proposed pipelined multithreading...

Thermal monitoring mechanisms for chip multiprocessors
Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, Rajarshi Mukherjee
Article No.: 9
DOI: 10.1145/1400112.1400114

With large-scale integration and increasing power densities, thermal management has become an important tool to maintain performance and reliability in modern process technologies. In the core of dynamic thermal management schemes lies accurate...

Distilling the essence of proprietary workloads into miniature benchmarks
Ajay Joshi, Lieven Eeckhout, Robert H. Bell, Jr., Lizy K. John
Article No.: 10
DOI: 10.1145/1400112.1400115

Benchmarks set standards for innovation in computer architecture research and industry product development. Consequently, it is of paramount importance that these workloads are representative of real-world applications. However, composing such...

Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems
Vincenzo Catania, Maurizio Palesi, Davide Patti
Article No.: 11
DOI: 10.1145/1400112.1400116

Architectures based on very-long instruction word (VLIW) have found fertile ground in multimedia electronic appliances thanks to their ability to exploit high degrees of instruction level parallelism (ILP) with a reasonable trade-off in complexity...