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ACM Transactions on Architecture and Code Optimization (TACO), Volume 2 Issue 4, December 2005

Improving WCET by applying a WC code-positioning optimization
Wankang Zhao, David Whalley, Christopher Healy, Frank Mueller
Pages: 335-365
DOI: 10.1145/1113841.1113842
Applications in embedded systems often need to meet specified timing constraints. It is advantageous to not only calculate the worst-case execution time (WCET) of an application, but to also perform transformation, which reduce the WCET, since an...

Software-controlled fault tolerance
George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee
Pages: 366-396
DOI: 10.1145/1113841.1113843
Traditional fault-tolerance techniques typically utilize resources ineffectively because they cannot adapt to the changing reliability and performance demands of a system. This paper proposes software-controlled fault tolerance, a concept allowing...

Power-performance considerations of parallel computing on chip multiprocessors
Jian Li, José F. Martínez
Pages: 397-422
DOI: 10.1145/1113841.1113844
This paper looks at the power-performance implications of running parallel applications on chip multiprocessors (CMPs). First, we develop an analytical model that, for the first time, puts together parallel efficiency, granularity of parallelism, and...

Spectral prefetcher: An effective mechanism for L2 cache prefetching
Saurabh Sharma, Jesse G. Beu, Thomas M. Conte
Pages: 423-450
DOI: 10.1145/1113841.1113845
Effective data prefetching requires accurate mechanisms to predict embedded patterns in the miss reference behavior. This paper proposes a novel prefetching mechanism, called the spectral prefetcher (SP), that accurately identifies the pattern by...